Honorary Speaker
Opening Remarks
Haisheng Rong’s research is focused on delivering ‘high bandwidth density and energy-efficient optical I/O networks enabled by silicon photonics technology’.
While Rong believes that ‘low-cost manufacturing and co-packaging of electronic and photonic chips’ are a challenge in that regard, Intel Labs did announce this summer that it had demonstrated an eight-wavelength distributed feedback (DFB) laser array that was fully integrated on a silicon wafer and was designed and fabricated on Intel's 300 mm hybrid silicon photonics platform. At the time, Rong said:
‘This new research demonstrates that it’s possible to achieve well-matched output power with uniform and densely spaced wavelengths. Most importantly, this can be done using existing manufacturing and process controls … ensuring a clear path to volume production of the next-generation co-packaged optics and optical compute interconnect at scale.’
Sr. Principal Engineer and R&D Manager at Intel Corp, Fellow of IEEE, Optica, SPIE
Assistant Professor of Electrical and Computer Engineering, KAUST
Sr. Principal Engineer and R&D Manager at Intel Corp, Fellow of IEEE, Optica, SPIE
Professor of Electrical and Computer Engineering, KAUST
Dean and Professor, Fudan University
KACST
Honorary Guests
Haisheng Rong’s research is focused on delivering ‘high bandwidth density and energy-efficient optical I/O networks enabled by silicon photonics technology’.
While Rong believes that ‘low-cost manufacturing and co-packaging of electronic and photonic chips’ are a challenge in that regard, Intel Labs did announce this summer that it had demonstrated an eight-wavelength distributed feedback (DFB) laser array that was fully integrated on a silicon wafer and was designed and fabricated on Intel's 300 mm hybrid silicon photonics platform. At the time, Rong said:
‘This new research demonstrates that it’s possible to achieve well-matched output power with uniform and densely spaced wavelengths. Most importantly, this can be done using existing manufacturing and process controls … ensuring a clear path to volume production of the next-generation co-packaged optics and optical compute interconnect at scale.’
Sr. Principal Engineer and R&D Manager at Intel Corp, Fellow of IEEE, Optica, SPIE
Assistant Professor of Electrical and Computer Engineering, KAUST
Sr. Principal Engineer and R&D Manager at Intel Corp, Fellow of IEEE, Optica, SPIE
Professor of Electrical and Computer Engineering, KAUST
Dean and Professor, Fudan University
KACST
External Speakers
Haisheng Rong’s research is focused on delivering ‘high bandwidth density and energy-efficient optical I/O networks enabled by silicon photonics technology’.
While Rong believes that ‘low-cost manufacturing and co-packaging of electronic and photonic chips’ are a challenge in that regard, Intel Labs did announce this summer that it had demonstrated an eight-wavelength distributed feedback (DFB) laser array that was fully integrated on a silicon wafer and was designed and fabricated on Intel's 300 mm hybrid silicon photonics platform. At the time, Rong said:
‘This new research demonstrates that it’s possible to achieve well-matched output power with uniform and densely spaced wavelengths. Most importantly, this can be done using existing manufacturing and process controls … ensuring a clear path to volume production of the next-generation co-packaged optics and optical compute interconnect at scale.’
Sr. Principal Engineer and R&D Manager at Intel Corp, Fellow of IEEE, Optica, SPIE
Assistant Professor of Electrical and Computer Engineering, KAUST
Sr. Principal Engineer and R&D Manager at Intel Corp, Fellow of IEEE, Optica, SPIE
Professor of Electrical and Computer Engineering, KAUST
Dean and Professor, Fudan University
KACST
KAUST Speakers
Haisheng Rong’s research is focused on delivering ‘high bandwidth density and energy-efficient optical I/O networks enabled by silicon photonics technology’.
While Rong believes that ‘low-cost manufacturing and co-packaging of electronic and photonic chips’ are a challenge in that regard, Intel Labs did announce this summer that it had demonstrated an eight-wavelength distributed feedback (DFB) laser array that was fully integrated on a silicon wafer and was designed and fabricated on Intel's 300 mm hybrid silicon photonics platform. At the time, Rong said:
‘This new research demonstrates that it’s possible to achieve well-matched output power with uniform and densely spaced wavelengths. Most importantly, this can be done using existing manufacturing and process controls … ensuring a clear path to volume production of the next-generation co-packaged optics and optical compute interconnect at scale.’
Sr. Principal Engineer and R&D Manager at Intel Corp, Fellow of IEEE, Optica, SPIE
Assistant Professor of Electrical and Computer Engineering, KAUST
Sr. Principal Engineer and R&D Manager at Intel Corp, Fellow of IEEE, Optica, SPIE
Professor of Electrical and Computer Engineering, KAUST
Dean and Professor, Fudan University
KACST